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Monty Hayes Phones & Addresses

  • 895 Granite Dr, Kokomo, IN 46902 (765) 868-2085
  • Henderson, KY
  • 2047 Lincoln Ave, Saint Albans, WV 25177 (304) 727-8489
  • Blacksburg, VA
  • 759 Sinclair Ave, Henderson, KY 42420 (304) 727-8489

Resumes

Resumes

Monty Hayes Photo 1

Manager, Advanced Electrification At Delphi

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Location:
Kokomo, Indiana Area

Publications

Us Patents

Vertical Laminated Electrical Switch Circuit

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US Patent:
7423332, Sep 9, 2008
Filed:
Aug 26, 2003
Appl. No.:
10/647981
Inventors:
Erich W. Gerbsch - Cicero IN,
Monty B. Hayes - Kokomo IN,
Robert J. Campbell - Noblesville IN,
Assignee:
Delphi Technologies, Inc. - Troy MI
International Classification:
H01L 23/02
H02B 1/00
US Classification:
257678, 257700, 257734, 257748, 257750, 257E29001, 257E29043, 361600, 361190
Abstract:
A vertical laminated electrical switch circuit includes a first, second, and third ceramic substrate positioned in juxtaposed relationship relative to each other. The circuit also includes a first and second electrical device electrically coupled to each other. The first electrical device is coupled to the first and second substrates and positioned there between. The second electrical device is coupled to the second and third ceramic substrates and positioned there between. In some embodiments, multiple electrical devices may be coupled to a single substrate.

Semiconductor Power Module With Flexible Circuit Leadframe

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US Patent:
7960817, Jun 14, 2011
Filed:
Sep 5, 2007
Appl. No.:
11/899365
Inventors:
Erich W. Gerbsch - Cicero IN,
Robert D. Maple - Fishers IN,
Monty B. Hayes - Kokomo IN,
Robert J. Campbell - Noblesville IN,
Assignee:
Delphi Technologies, Inc. - Troy MI
International Classification:
H01L 23/495
US Classification:
257675, 257719, 257712, 257E23051
Abstract:
A semiconductor power module includes a semiconductor chip thermally interfaced to a ceramic substrate and a leadframe defined by a flexible circuit disposed intermediate the chip and the ceramic substrate. The flexible circuit includes a conductor layer that is selectively encased in an insulated jacket to ensure adequate electrical insulation between the conductor layer and adjacent conductive surfaces. Preferably, the module is constructed for double side cooling by sandwiching the chip between a pair of ceramic substrates and providing intermediate flexible circuit leadframes on both sides of the chip for electrically accessing the chip terminals.

Semiconductor Device With Diagonal Gate Signal Distribution Runner

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US Patent:
2005028, Dec 22, 2005
Filed:
Jun 22, 2004
Appl. No.:
10/873429
Inventors:
Monty Hayes - Kokomo IN,
Robert Campbell - Noblesville IN,
John Fruth - Kokomo IN,
International Classification:
H01L029/76
US Classification:
257288000, 257262000
Abstract:
A semiconductor device includes a device body, a gate pad and a gate signal distribution runner. The device body includes a plurality of parallel cells and the gate pad is located on a top surface of the device body adjacent a corner of the device body. The gate signal distribution runner includes a peripheral gate signal distribution runner extending around the periphery of the device body from the gate pad and a diagonal gate signal distribution runner extending diagonally across the device body from the gate pad. The gate signal distribution runner provides a gate signal to a gate of each of the plurality of parallel cells.

Semiconductor Device With Split Pad Design

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US Patent:
2006015, Jul 13, 2006
Filed:
Jan 13, 2005
Appl. No.:
11/035212
Inventors:
Robert Campbell - Noblesville IN,
Monty Hayes - Kokomo IN,
John Fruth - Kokomo IN,
International Classification:
H01L 23/58
US Classification:
257048000
Abstract:
A semiconductor device includes a device body, a pad and a signal distribution runner. The device body includes a plurality of parallel cells and at least one integrated electronic component. The pad is located on a surface of the device body and includes a first portion and a second portion that are electrically isolated. The signal distribution runner is electrically coupled to and extends from the first portion of the pad. The signal distribution runner provides a signal to a same terminal of each of the plurality of parallel cells. The at least one integrated electronic component is electrically coupled to the second portion of the pad.

Parallel Dual Switch Module

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US Patent:
6054765, Apr 25, 2000
Filed:
Apr 27, 1998
Appl. No.:
9/067242
Inventors:
Charles Tyler Eytcheson - Kokomo IN
Monty Bradford Hayes - Kokomo IN
Lisa Ann Viduya - Carmel IN
Roger Allen Mock - Kokomo IN
Eric Von Kierstead - Anderson IN
Todd G. Nakanishi - Noblesville IN
Robert John Campbell - Noblesville IN
Erich William Gerbsch - Brownsburg IN
Assignee:
Delco Electronics Corporation - Kokomo IN
International Classification:
H01L 2334
US Classification:
257724
Abstract:
A parallel dual switch module that is characterized by improved mechanical and electrical packaging efficiency and low cost. The module includes a common terminal defined by a first stamped elongate metal plate insert molded into the module housing, and positive and negative terminals defined by second and third stamped elongate metal plates disposed side-by-side atop the common terminal. Connection areas formed on the positive and negative terminals extend in opposite lateral directions, and interdigitate with connection areas formed on the common terminal, thereby forming two linear parallel rows of connection areas. Adjacent each row of connection areas, and mounted on a baseplate of the module is a set of parallel connected transistors subassemblies. A molded elongate gate collection component is mounted on the baseplate between the sets of transistor subassemblies, and beneath the common terminal. The gate collection component confines a pair of insert molded gate terminal strips to which the gate terminals of the respective sets of transistor subassemblies are connected, and the terminal strips, in turn, are coupled to gate terminals of the module.
Monty B Hayes from Kokomo, IN, age ~55 Get Report